ESR meter based on synchronous rectifier – Part 5SE-PLL

Background:

We talked about the use of synchronous rectifiers to measure ESR:

  1. Concept here;
  2. a workable version here: it is built on discrete logic;
  3. a singled ended version that utilizes a high-side current sense amplifier here;
  4. the singled-ended version in action here;
  5. in Part 5, we put forth a version powered by an ATtiny85 (functioning as a signal generator only).

At the end of Part5SE, we talked about the potential to run the ATtiny timer at higher clock rate so we will generate 100Khz (or higher) signal. In this post, we will talk about its implementation and some initial measurements I took with two versions of the same basic design.

Schematic:

attiny85 sd se-pll sch.PNG

The design is very straight forward:

  1. ATtiny85 acts like a signal generator: it generates a square wave signal to drive DUT through a current limiting resistor R1.
  2. The signal across the DUT is picked up by the synchronous detector built around a HC4053 and a differential output, proportional to the voltage across ESR, is produced across C4. R7 simulates a DMM’s input impedance.
  3. That signal is fairly small. So in cases where additional amplification is needed, an optional difference amplifier is built around a dual opamp (LM358 shown). R3 sets the gain of the difference amplifier.
  4. Note: R7 and R9 simulate loading by your meter(s) and they should NOT be wired into actual construction.

As you can see, the simplest version of this ESR meter requires just an ATtiny85 and an analog switch (1/3 of a HC4053). Adding a 3rd chip (LM358 or the likes), you get additional gain out of the meter.

 

Additional flexibility also exists through the firmware which provides four square wave output pins that you can use to build up to 3 additional channels of ESR meters, or to build a fully-balanced ESR meter that can measure DC resistance and be calibrated by standard resistors. See the Firmware section for more details.

The Firmware:

The basic principle here is simple:

  1. Use of Timer0 to generate two independent pulse trains on OC0A and OC0B. We picked 16Khz as a good low-frequency here. Duty cycles controlled by OCR0A and OCR0B;5se-pll 16Khz.JPG
  2. Use Timer1 clocked by the 32Mhz PLL oscillator to generate two out-of-phase pulse trains at 100Khz. The signal’s period is controlled via OCR1C.5se-pll 100Khz.JPG

Here is the hex file for the firmware:


:100000000EC01DC01CC01BC01AC019C018C017C02C
:1000100016C015C014C013C012C011C010C01124E6
:100020001FBECFE5D2E0DEBFCDBF10E0A0E6B0E05E
:1000300001C01D92A036B107E1F73BD03DC1E0CF32
:10004000DF93CF93CDB7DEB7CF91DF910895DF93E4
:10005000CF93CDB7DEB7A8E3B0E0E8E3F0E080816E
:100060008B7F8C93A7E3B0E0E7E3F0E080818460CE
:100070008C9399D0EDE4F0E080EA8083EDE4F0E049
:1000800080818695882F90E0DFD0EED0A8E3B0E0A5
:10009000E8E3F0E0808184608C9381E06FEF10D022
:1000A0003AD08FE764D04DD08FE76FD0CF91DF91FA
:1000B0000895DF93CF93CDB7DEB7C2DFC8DFFFCFA0
:1000C000DF93CF9300D0CDB7DEB789836A83A3E5F2
:1000D000B0E0E3E5F0E08081807F8C93EAE4F0E03B
:1000E00081E08083E2E5F0E01082A9E5B0E0E9E597
:1000F000F0E080818D7F8C93A3E5B0E0E3E5F0E054
:100100008081982F89818770892B8C930F900F9015
:10011000CF91DF910895DF93CF93CDB7DEB7AAE4F7
:10012000B0E0EAE4F0E080818F7380688C93A7E30D
:10013000B0E0E7E3F0E0808181608C93CF91DF91C4
:100140000895DF93CF93CDB7DEB7AAE4B0E0EAE439
:10015000F0E080818F7C80628C93A7E3B0E0E7E3DE
:10016000F0E0808182608C93CF91DF910895DF93DE
:10017000CF930F92CDB7DEB78983E9E4F0E08981B0
:1001800080830F90CF91DF910895DF93CF930F92EB
:10019000CDB7DEB78983E8E4F0E0898180830F90F2
:1001A000CF91DF910895DF93CF9300D00F92CDB719
:1001B000DEB7A7E3B0E0E7E3F0E0808180618C93F5
:1001C000A7E3B0E0E7E3F0E0808188608C93A0E5EE
:1001D000B0E0E0E5F0E08081807F8C93E9E5F0E03D
:1001E00010828DE490E09B838A83EDE4F0E08081CF
:1001F000882329F0EDE4F0E09081998302C0EFEFCD
:10020000E9838981EA81FB818083ABE4B0E0EDE49E
:10021000F0E0808186958C93ACE4B0E0ECE4F0E013
:10022000808181788C658C93EFE4F0E01082A0E50A
:10023000B0E0E0E5F0E0808182688C930F900F9051
:100240000F90CF91DF910895DF93CF9300D0CDB77A
:10025000DEB79A838983EBE4F0E0898180830F9095
:100260000F90CF91DF910895DF93CF93CDB7DEB795
:10027000E7E4F0E01082A7E4B0E0E7E4F0E080819A
:1002800080688C93A7E4B0E0E7E4F0E080818260CE
:100290008C93E7E4F0E08081882F90E0817090708B
:1002A0000097B9F3A7E4B0E0E7E4F0E08081846070
:0C02B0008C93CF91DF910895F894FFCF5C
:00000001FF

Please copy-and-paste it into a .hex file and burn it to your ATtiny85. I used AVRDudess.

Note:

  1. Fuse setting: low fuse of 0x62 and high fuse of 0xdf, so the chip runs off internal RC oscillator at 8Mhz.
  2. PB3/PB4: 100Khz differential output on OC1B/PB4/Pin3 and nOC1B/PB3/Pin2. This pair of signals are out-of-phase but otherwise can be utilized separately. If used separately, they can drive additional DUTs to be utilized by the two other sets of unused switches in the HC4053. If used as a pair, you can build a fully-balanced synchronous detector – see Part5 for how that can be done, with the addition of two resistors. The advantage of a fully balanced detector is its ability to measure DC resistance, not just ESR.
  3. PB0/PB1: 16Khz in-phase output on OC0A/PB0/Pin5 and OC0B/PB1/Pin6. You can use one or both pins to drive one or two detectors. I have found very little difference between driving the synchronous detector with the 16Khz signal or the 100Khz signal. They seem to be fairly comparable, with the 100Khz signal generating audible RF interference onto a near-by receiver in the FM band.
  4. PB2: PLL lock indicator. This pin goes high when the PLL is locked. If you want, you can connect a led + a resistor to it. Or leave it unconnected.

The Two-Chip Version:

Presented below is the simplified version using only two chips: ATtiny85 and 1/3 of HC4053, the difference amplifier is not built in this version. Instead, ESR readings are taken off C4 differentially as voltage readings and converted to ESR resistance.

Because of that, you have to alter R1 so that the readings are more intuitive. I used 10mv/1R scale for simplicity. To achieve that, I used a 1Kpot in lieu of R1. 

  • The value required for R1 to achieve this level of scale is around 400R.

5se-pll 1R.JPG

Additional measurements:

10R -> 100.6mv;

5R -> 50.9mv;

1R -> 10.8mv;

0R1 -> 0.8mv;

I also measured two capacitors:

  1. 4.7uf capacitor. Reading = 10mv -> ESR = 1R: 5se-pll 4_7uf.JPG
  2. 11uf capacitor. Reading = 13.2mv -> ESR = 1R3: 5se-pll 11uf.JPG

General note:

  1. Analog switch: I have tried an ONSemi NLAS4053 and a knock-off HC4053. No detectable difference. If you are only building for one channel, it may make sense to use single SPDT switches. I have some TS5A3159 coming in for example, and I can easily solder both to a PCB adapter.
  2. Offset / Zeroing: because of device imperfections and my use of a DC blocking electrolytic capacitor, I had a small offset – about 1.2mv. One easy way to counter that is to use a multi-meter with relative measurements, like I did. Or if you don’t care about small errors, just forget about it.
  3. R1 calibration: adjust the pot to the middle. Short the DUT- with a DC blocking capacitor in serial with it. Zero your meter to that reading. Unshort the DUT and put in a standard resistor – I used a 1R resistor. Adjust R1 slowly so that the meter reads 10mv. Your baseline reading may change slightly as a result of this so you may wish to go back re-zeroing the meter. After a couple of rounds of adjustments, you should get very good readings.
  4. 100Khz source vs. 16Khz source: minimal differences. I personally prefer the 16Khz source due to reduced RF interference. At 100Khz, the meter readings fluctuation even when you put your hands close to the instrument, or you move your body around.
  5. Part count: a total of 7 components, consisting of 1x ATtiny85, 1x analog switch (1/3 HC4053 or equivalent), 1x pot (R1, 1K), 1x resistor (10K), 3x capacitors (0.1uf). Less than $5 in total.

 

The Three-Chip Version:

The Two-Chip version presented above have low gain, making it difficult to get more accurate reading in the <1R range. A difference amplifier built around a dual-opamp will help.

That task is accomplished by a LM358 (or its equivalent). It is a standard two-opamp instrumentation amplifier, with a gain of 1+2*R4/R3, assuming R4=R8. Given fixed values for R4/R8, R3 sets the gain of the opamp.

Here is this meter in action:

  1. measuring a 1R resistor: 5se-pll amp 1R.JPG
  2. measuring a 10R/10R/10R resistor combination: 5se-pll amp 3R3.JPG

Additional measurements:

10R -> Reading = 984mv;

5R -> Reading = 496mv;

3R3 -> Reading = 331mv;

1R -> Reading = 102mv – measurements vary slightly from run to run;

0R1 -> Reading = 10mv;

0R05 -> Reading = 6mv: 5se-pll amp 0R05.JPG

  • It is critical to match R4 / R8: while their absolute values don’t matter much, they have to be matched on the same meter as closely to each other as possible.
  • R3 choices: there are two ways to approach R3, depending on your preference.
    1. Retain R1 as a pot: in this case, you can pick a fixed resistor for R3. I used a 220R resistor for simplicity.
    2. R1 as a resistor (1K or 1K//1K): in this case, I would construct R3 this way: a 1K pot in serial with a 110R resistor and then parallel the combination with a 330R or 390R resistor. This is to maximize the range of motion for R3 to be around 220R.
  • 100Khz vs. 16Khz: again, no detectable difference aside from RF interference at 100Khz. Readings from the same device taking at 100Khz are comparable to readings taken at 16Khz.
  • Opamp choices: I tried a few opamps, from TL062, NE5532, LM358 to TDA1308. No real difference, aside from more limited effective range for TL062 and NE5532 -> those guys top out at 500 – 600mv and above that non-linearity sets in. LM358 wins in terms of maximum range and low cost / good availability. My experiment suggests that this meter isn’t sensitive to your choices of opamp.
  • Gain setting: the amp is set-up to go to 100x in gain. In reality, you can retard the gain to 10x by going with 1K resistors as R4/R8, and reducing R1 from 1K to 1K//1K. I found this version to be slightly more stable.
  • Part count: in addition to the 7 parts required for the Two-Chip version, you have to use 1x dual opamp, three resistors (one of them could be a pot + two resistors), for a total of 11 – 13 parts. Still less than $5 if you use a LM358, :).

Conclusion:

  • I really liked the Two-Chip version, for its simplicity, low part count and ease of construction. The limited low-end doesn’t bother me as an ESR instrument.
  • My prior favorite ESR meter is the analog one built around one dual-opamp: original design here: link, and current extended version here: link. They do not need programming but are more complex and require a coil meter.

After-Thoughts:

  • Balanced vs. Single-Ended Synchronous Detectors: very effective in measuring ESR. Balanced detectors has twice the gain, can measure DC resistance (thus doubles as milliohm meters), and can be calibrated by standard resistors. Two more resistors are all you need to convert an SE version to Balanced version.
  • Digital Read-out: we can use the ADC module (with a 20x PGA) in the ATtiny to read out the voltage across C4 and send that information to a I2C display. Requires a total of 6 pins.
  • Analog Read-out: alternatively, we can use one pin to drive a coil meter to analogly display the ESR reading. 256 scales so if you pick the top end to be 10R, the resolution is about 0R05. More than enough.
  • 1 Chip solution: It is entirely possible to actually use the mcu to perform synchronous detection through its port pins and a bi-polar differential ADC module. The ATtiny85 unfortunately only has a uni-polar differential ADC. A chip like the ATtiny861, which I have a ton of, would do this with ease.
  • 100Khz source: I had a hard time seeing the benefits of running this meter at 100Khz. It seems to me that 32Khz or 50Khz is perfectly OK.

 

 

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